https://github.com/viveris/jtag-boundary-scanner
JTAG boundary scan debug & test tool.
https://github.com/viveris/jtag-boundary-scanner
boundary-scan debug jtag jtag-boundary-scan jtag-probe tool
Last synced: 6 months ago
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JTAG boundary scan debug & test tool.
- Host: GitHub
- URL: https://github.com/viveris/jtag-boundary-scanner
- Owner: viveris
- License: gpl-3.0
- Created: 2019-01-30T13:01:52.000Z (over 7 years ago)
- Default Branch: master
- Last Pushed: 2024-10-28T20:31:27.000Z (over 1 year ago)
- Last Synced: 2025-06-19T12:02:23.000Z (about 1 year ago)
- Topics: boundary-scan, debug, jtag, jtag-boundary-scan, jtag-probe, tool
- Language: C
- Homepage:
- Size: 422 KB
- Stars: 147
- Watchers: 23
- Forks: 38
- Open Issues: 17
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Metadata Files:
- Readme: README.md
- License: LICENSE
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README

# JTAG Boundary Scanner
## JTAG Boundary-scan board debugging/test software
The JTAG Boundary Scanner is a JTAG software tool to debug or test any electronic boards with a JTAG interface.

### Main characteristics and features
- Windows version GUI.
- Implemented in C.
- BSDL files support.
- Target IO pins sampling and control mode ( SAMPLE & EXTEST ).
- I2C Bus over JTAG emulation.
- SPI Bus over JTAG emulation.
- MDIO Bus over JTAG emulation.
- Parallel port bus over JTAG emulation.
- JTAG Bus scan and devices auto-detection.
- BSDL files auto-load.
- script support.
- socket interface for remote control.
### Supported Probes
- FTDI FT2232H based JTAG probes support (Olimex ARM-USB_OCD-H, Lattice HW-USBN-2B, Xilinx...).
- JLINK JTAG probes support.
Note : JLinkARM.dll need to be copied into the JTAGBoundaryScanner folder for the JLink probes support.
- Parallel port based JTAG probes support (Altera ByteBlaster, Memec IJC-4, Macgraigor Wiggler).
## License
This project is licensed under the GNU General Public License version 3 - see the [LICENSE](LICENSE) file for details