https://github.com/vusec/trrespass
TRRespass
https://github.com/vusec/trrespass
Last synced: about 1 month ago
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TRRespass
- Host: GitHub
- URL: https://github.com/vusec/trrespass
- Owner: vusec
- License: apache-2.0
- Created: 2020-03-10T15:05:36.000Z (about 6 years ago)
- Default Branch: master
- Last Pushed: 2021-05-05T10:35:44.000Z (almost 5 years ago)
- Last Synced: 2024-04-20T00:38:16.320Z (almost 2 years ago)
- Language: C
- Size: 49.8 KB
- Stars: 113
- Watchers: 30
- Forks: 22
- Open Issues: 6
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Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
- awesome-pentest - TRRespass - Many-sided rowhammer tool suite able to reverse engineer the contents of DDR3 and DDR4 memory chips protected by Target Row Refresh mitigations. (Side-channel Tools / Reverse Engineering Tools)
- fucking-awesome-pentest - TRRespass - Many-sided rowhammer tool suite able to reverse engineer the contents of DDR3 and DDR4 memory chips protected by Target Row Refresh mitigations. (Side-channel Tools / Reverse Engineering Tools)
- awesome-penetest - TRRespass - Many-sided rowhammer tool suite able to reverse engineer the contents of DDR3 and DDR4 memory chips protected by Target Row Refresh mitigations. (Side-channel Tools / Reverse Engineering Tools)
- penetration-testing - TRRespass - Many-sided rowhammer tool suite able to reverse engineer the contents of DDR3 and DDR4 memory chips protected by Target Row Refresh mitigations. (Side-channel Tools / Reverse Engineering Tools)
- awesome-pentest - TRRespass - Many-sided rowhammer tool suite able to reverse engineer the contents of DDR3 and DDR4 memory chips protected by Target Row Refresh mitigations. (Side-channel Tools / Reverse Engineering Tools)
README
# TRRespass
This is the repository for the TRRespass Rowhammer fuzzer. Recent DDR4 chips include on-chip TRR mitigations that stop bit flips using standard Rowhammer access patterns such as double-sided, single sided or one-location hammering. TRRespass automatically discovers novel Many-sided Rowhammer variants that can bypass these mitigations and trigger bit flips on the recent systems with DDR4 memory. TRRespass requires the DRAM address mapping functions to work effectively.
Additional information about TRRespass can be found here: https://www.vusec.net/projects/trrespass/
The paper that describes more details appears at IEEE Security and Privacy 2020 and can be found here: https://download.vusec.net/papers/trrespass_sp20.pdf
### ./drama
Inside the `drama` folder you can find a tool that helps you reverse engineer the DRAM memory mappings used by the memory controller.
Read the README in the folder for more details
### ./hammersuite
Inside the `hammersuite` folder you can find the fuzzer we used.
Again, read the README in the folder for more details