https://github.com/wdevore/verilog-7400-ttls

A series of 7400 TTL Verilog modules
https://github.com/wdevore/verilog-7400-ttls

Last synced: 4 months ago
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A series of 7400 TTL Verilog modules

• Host: GitHub
• URL: https://github.com/wdevore/verilog-7400-ttls
• Owner: wdevore
• License: mit
• Created: 2019-11-16T22:03:41.000Z (over 6 years ago)
• Default Branch: master
• Last Pushed: 2020-12-02T03:04:14.000Z (over 5 years ago)
• Last Synced: 2025-07-07T22:08:33.346Z (11 months ago)
• Language: Verilog
• Size: 108 KB
• Stars: 2
• Watchers: 3
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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# Verilog-7400-TTLs

A series of 7400 TTL Verilog modules