https://github.com/wipeseals/riscv-reg-analysis

A web-based parser and analyzer for RISC-V register dumps from the Vitis XSDB.
https://github.com/wipeseals/riscv-reg-analysis

debug riscv vibecoding

Last synced: 4 months ago
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A web-based parser and analyzer for RISC-V register dumps from the Vitis XSDB.

• Host: GitHub
• URL: https://github.com/wipeseals/riscv-reg-analysis
• Owner: wipeseals
• License: mit
• Created: 2025-07-20T05:13:21.000Z (11 months ago)
• Default Branch: master
• Last Pushed: 2025-07-20T05:35:42.000Z (11 months ago)
• Last Synced: 2025-07-20T07:20:57.297Z (11 months ago)
• Topics: debug, riscv, vibecoding
• Language: HTML
• Homepage: https://wipeseals.github.io/riscv-reg-analysis/
• Size: 18.6 KB
• Stars: 0
• Watchers: 0
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

Awesome Lists containing this project

README

          
# RISC-V CSR & Debug Analysis Tool

[![Deploy static content to Pages](https://github.com/wipeseals/riscv-reg-analysis/actions/workflows/static.yml/badge.svg)](https://github.com/wipeseals/riscv-reg-analysis/actions/workflows/static.yml)

Web-based tool for comprehensive analysis of RISC-V processor state from XSDB dumps.

## 🚀 Features

- **CSR Analysis**: Detailed breakdown of Control and Status Registers with bit-level visualization

- **Debug Support**: Debug register analysis including DCSR, DPC, and trigger registers  

- **Memory Analysis**: Memory dump parsing and analysis

- **Backtrace Support**: Stack trace analysis from debug dumps

- **Disassembly**: Instruction disassembly analysis

- **URL Sharing**: Share analysis results via compressed URLs

- **Interactive UI**: Dark-themed, responsive web interface

## 📋 Supported Commands

| Command | Description |

|---------|-------------|

| `rrd` | General register dump analysis |

| `rrd csr` | CSR-specific register analysis |

| `bt` | Backtrace/stack trace analysis |

| `dis` | Disassembly analysis |

| `mrd` | Memory read dump analysis |

## 🔧 Usage

1. **Access the tool**: Visit the [live deployment](https://wipeseals.github.io/riscv-reg-analysis/)

2. **Paste XSDB output**: Copy output from supported XSDB commands

3. **Analyze**: Click "Analyze" or press Ctrl+Enter

4. **Share**: Use "Share via URL" to generate shareable links

## 🏗️ Architecture

- **Single-page application**: Pure HTML/CSS/JavaScript

- **No dependencies**: Runs entirely in the browser

- **GitHub Pages**: Automatically deployed on push to master branch

## 📄 License

MIT License - see [LICENSE](LICENSE) file for details.

## 🔗 Links

- [Live Tool](https://wipeseals.github.io/riscv-reg-analysis/)

- [Repository](https://github.com/wipeseals/riscv-reg-analysis)

- [Issues](https://github.com/wipeseals/riscv-reg-analysis/issues)