https://github.com/wissance/imagecapturesystem
A Xilinx IP Core and App for line scanner image capture and store
https://github.com/wissance/imagecapturesystem
awaiba axi-quad-spi axi-vdma capture-the-flag cmosis computer-vision dr-2k-7 dragster image linescanners scanner spi two-channel-image-capture-system video video-ip-core xilinx-axi-vdma xilinx-fpga xilinx-ip xilinx-vivado
Last synced: 6 months ago
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A Xilinx IP Core and App for line scanner image capture and store
- Host: GitHub
- URL: https://github.com/wissance/imagecapturesystem
- Owner: Wissance
- Created: 2016-09-14T16:55:35.000Z (about 9 years ago)
- Default Branch: master
- Last Pushed: 2017-09-05T14:49:39.000Z (about 8 years ago)
- Last Synced: 2025-02-09T15:42:54.750Z (8 months ago)
- Topics: awaiba, axi-quad-spi, axi-vdma, capture-the-flag, cmosis, computer-vision, dr-2k-7, dragster, image, linescanners, scanner, spi, two-channel-image-capture-system, video, video-ip-core, xilinx-axi-vdma, xilinx-fpga, xilinx-ip, xilinx-vivado
- Language: VHDL
- Homepage:
- Size: 43.6 MB
- Stars: 11
- Watchers: 5
- Forks: 6
- Open Issues: 0
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Metadata Files:
- Readme: README.md
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README
# ImageCpatureSystem
Xilinx IP Core for Zynq 7k SoC for 2 channel image capture from CMOSIS/AWAIBA/Dragster linescanners.
Data stored in separate RAM Area for each channel.
In very simple approach we work with C++ Standalone application (written in C style with structs, no classes).
This app could do following:
1) Configure each scanner via SPI and AXI Quad SPI IP core
2) Managing image capture proccess (Start/Stop).
3) Store data in RAM
For alpha version we are planning to save captured data on uSD card and configure AXI VDMA Cores.
Main Contributors are:
Ushakov Michael (EvilLord666, um.nix.user@gmail.com)
Alex Petrov (veryniceguy, )