https://github.com/wokwi/verispell

SPELL implementation in Verilog
https://github.com/wokwi/verispell

Last synced: 11 days ago
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SPELL implementation in Verilog

• Host: GitHub
• URL: https://github.com/wokwi/verispell
• Owner: wokwi
• Created: 2021-12-01T20:12:21.000Z (about 4 years ago)
• Default Branch: master
• Last Pushed: 2022-12-04T10:49:34.000Z (about 3 years ago)
• Last Synced: 2025-01-16T14:51:27.448Z (11 months ago)
• Language: Verilog
• Size: 83 KB
• Stars: 0
• Watchers: 2
• Forks: 1
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

          
# veriSPELL in 

SPELL is a minimal, stack-based programming language created for [The Skull CTF](https://skullctf.com).

The language is defined by [a cryptic piece of Arduino code](https://skullctf.com/spell). 

This aims to implements a microcontroller that can execute SPELL code directly.

## Tool installation

Ubuntu setup:

```bash

sudo apt install make iverilog gtk-wave python3-pip

pip install -r requirements.txt

```

For code formatting, also install [verible](https://github.com/chipsalliance/verible).

## Copyright

Copyright (C) 2021, Uri Shaked.