https://github.com/xen0n/larva

PoC LoongArch - RISC-V emulator
https://github.com/xen0n/larva

loongarch riscv

Last synced: about 2 months ago
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PoC LoongArch - RISC-V emulator

• Host: GitHub
• URL: https://github.com/xen0n/larva
• Owner: xen0n
• License: gpl-3.0
• Created: 2022-05-06T08:56:17.000Z (over 2 years ago)
• Default Branch: develop
• Last Pushed: 2023-12-09T09:23:46.000Z (about 1 year ago)
• Last Synced: 2024-11-09T23:37:41.753Z (about 2 months ago)
• Topics: loongarch, riscv
• Language: Rust
• Homepage:
• Size: 70.3 KB
• Stars: 30
• Watchers: 3
• Forks: 1
• Open Issues: 1
• Metadata Files:
  • Readme: README.md
  • License: COPYING

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README

        
# LARVa - Bridging LoongArch to RISC-V

This project is a proof-of-concept RISC-V emulator aiming at near-native

execution performance on LoongArch.

Support may expand to other architectures in the future, if the techniques

employed here prove useful and reasonably arch-independent.

The project is named after a popular but extremely difficult chart with the

same name, in the rhythm game *maimai*. Binary translation is hard, running such

logic in privileged mode is even harder; while I cannot play the *maimai*

chart at all, I do hope to manage the difficulty *here* somehow!

## License

[GPL-3.0-or-later](https://spdx.org/licenses/GPL-3.0-or-later.html)

## Roadmap

* [x] RV64GC disassembly

* [ ] verification interpreter -- WIP

* [ ] emulation machinery

    * [x] guest MMU -- barebones

* [ ] linux-user emulation

    * [x] stack -- works okay

    * [ ] thread-local storage

    * [ ] syscalls -- WIP, only `exit_group` so far

* [ ] LoongArch assembly

* [ ] translation passes

* [ ] system level PoC

    - TODO