https://github.com/yamil-serrano/risc-v-assembly-exercises
A comprehensive collection of RISC-V Assembly exercises and practice programs for CIIC 4082: Computer Architecture II, designed to support learning and experimentation in low-level programming and computer architecture concepts.
https://github.com/yamil-serrano/risc-v-assembly-exercises
32bit assembly ripes risc-v
Last synced: 9 months ago
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A comprehensive collection of RISC-V Assembly exercises and practice programs for CIIC 4082: Computer Architecture II, designed to support learning and experimentation in low-level programming and computer architecture concepts.
- Host: GitHub
- URL: https://github.com/yamil-serrano/risc-v-assembly-exercises
- Owner: Yamil-Serrano
- License: mit
- Created: 2025-09-09T17:00:24.000Z (9 months ago)
- Default Branch: main
- Last Pushed: 2025-09-09T17:23:44.000Z (9 months ago)
- Last Synced: 2025-09-09T20:56:22.472Z (9 months ago)
- Topics: 32bit, assembly, ripes, risc-v
- Language: Assembly
- Homepage:
- Size: 3.91 KB
- Stars: 0
- Watchers: 0
- Forks: 0
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
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README
# RISC-V Assembly Exercises
This repository is a collection of **RISC-V Assembly practice programs** created as part of my coursework in **CIIC 4082: Computer Architecture II** at the University of Puerto Rico, Mayagüez. All examples were written and tested in the **[Ripes Simulator](https://github.com/mortbopet/Ripes)**, which provides an interactive environment to visualize registers, memory, and pipeline execution.
The programs included range from simple **array iterations** to basic algorithms, serving as a foundation for understanding how the RISC-V ISA works and reinforcing concepts learned in class.
---
## Why I Built This?
In **CIIC 4082**, we are introduced to **RISC-V programming**, which helps students understand the fundamentals of **low-level programming** and **computer architecture**.
I created this repository to:
* Practice **RISC-V Assembly instructions**, registers, and memory management.
* Learn how to **iterate over arrays**, use **branches and loops**, and implement basic algorithms.
* Build a personal reference of **RISC-V exercises** that can be reused or extended for more complex problems.
This collection documents my learning process and aims to help others who are starting with **RISC-V Assembly** as part of an academic course or self-study.
---
## How to Run (Ripes)
1. Install [Ripes](https://github.com/mortbopet/Ripes).
2. Clone this repository.
3. Go to src folder and open any `.s` file in Ripes.
4. Load the program and run it step by step or continuously.
---
## Technical Notes
* All `.s` files are written in **RISC-V Assembly (32bits)**.
* Memory is initialized in the `.data` section.
* Code execution starts in the `.text` section.
* Input/Output uses **ecall syscalls** supported by Ripes.
---
## License
This project is licensed under the MIT License – see the [LICENSE](LICENSE) file for details.