https://github.com/youseftareq33/digital_buildcombinationalcircuit_1

Using Verilog HDL on Quartus application build combinational circuit
https://github.com/youseftareq33/digital_buildcombinationalcircuit_1

combinational-circuit verilog

Last synced: 16 days ago
JSON representation

Using Verilog HDL on Quartus application build combinational circuit

• Host: GitHub
• URL: https://github.com/youseftareq33/digital_buildcombinationalcircuit_1
• Owner: youseftareq33
• Created: 2024-07-16T10:26:04.000Z (6 months ago)
• Default Branch: master
• Last Pushed: 2024-07-16T10:44:12.000Z (6 months ago)
• Last Synced: 2024-11-06T06:26:40.462Z (2 months ago)
• Topics: combinational-circuit, verilog
• Language: Verilog
• Homepage:
• Size: 2.08 MB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

Awesome Lists containing this project

README

        
# Build Combinational Circuit

Using Verilog HDL on Quartus application i implement:

1. 1-bit adder and then use it to build 4-bit adder structurally

2. MUX2x1 and then use it to build the Quad MUX 2x1 structurally

3. 4-bit OR Array

4. 4-bit AND Array

![](CombinationalCircuit_photo.jpg)