https://github.com/youseftareq33/digital_buildcombinationalcircuit_2

Using Verilog HDL on Quartus application build combinational circuit
https://github.com/youseftareq33/digital_buildcombinationalcircuit_2

combinational-circuit verilog

Last synced: 16 days ago
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Using Verilog HDL on Quartus application build combinational circuit

• Host: GitHub
• URL: https://github.com/youseftareq33/digital_buildcombinationalcircuit_2
• Owner: youseftareq33
• Created: 2024-07-16T10:51:49.000Z (6 months ago)
• Default Branch: master
• Last Pushed: 2024-07-16T11:02:18.000Z (6 months ago)
• Last Synced: 2024-11-06T06:26:41.098Z (2 months ago)
• Topics: combinational-circuit, verilog
• Language: HTML
• Homepage:
• Size: 3.83 MB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# Build Combinational Circuit

Using Verilog HDL on Quartus application i implement 1-bit ALU circuit shown in Figure below,

which i build the system components (Muxs and adder) separately,

then integrate the different system components to build the whole system.

# ALU circuit Fig

![](Alu_circuit.jpg)

# Combinational Circuit

![](CombinationalCircuit_photo.jpg)