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https://github.com/yrp604/bad64
Binja Arm64 Disassembler
https://github.com/yrp604/bad64
aarch64 arm64 armv8 binaryninja binja diassemble
Last synced: 18 days ago
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Binja Arm64 Disassembler
- Host: GitHub
- URL: https://github.com/yrp604/bad64
- Owner: yrp604
- License: apache-2.0
- Created: 2021-01-30T07:49:23.000Z (almost 4 years ago)
- Default Branch: main
- Last Pushed: 2023-11-30T19:30:55.000Z (12 months ago)
- Last Synced: 2024-08-09T05:51:40.806Z (3 months ago)
- Topics: aarch64, arm64, armv8, binaryninja, binja, diassemble
- Language: Rust
- Homepage:
- Size: 733 KB
- Stars: 83
- Watchers: 8
- Forks: 11
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
README
# Binja Arm64 Disassembler
[![Build Status]][actions] [![Latest Version]][crates.io] [![Latest Docs]][docs.rs]
[Build Status]: https://img.shields.io/github/actions/workflow/status/yrp604/bad64/rust.yml?branch=main
[actions]: https://github.com/yrp604/bad64/actions?query=branch%3Amain
[Latest Version]: https://img.shields.io/crates/v/bad64.svg
[crates.io]: https://crates.io/crates/bad64
[Latest Docs]: https://docs.rs/bad64/badge.svg
[docs.rs]: https://docs.rs/bad64These are bindings to the [Binary Ninja](https://binary.ninja) arm64
[architecture/disassembler plugin](https://github.com/Vector35/arch-arm64).Note that while Binary Ninja is an (excellent) commercial product, the
disassembler is entirely Apache 2 licensed and may be used without a license.
To install, just add bad64 as a normal dependency in Cargo.toml.For more information on how this disassembler was created, see [this blogpost][blogpost]
by [Andrew Lamoureux][andrew].[blogpost]: https://binary.ninja/2021/04/05/groundup-aarch64.html
[andrew]: https://github.com/lwerdnaFor docs and usage, please see [docs.rs](http://docs.rs/bad64) and the
[examples](examples).```
$ cargo run --example decode 0x91010420
Instruction {
address: 0x1000,
opcode: 0x91010420,
op: ADD,
num_operands: 0x3,
operands: [
Reg {
reg: X0,
arrspec: None,
},
Reg {
reg: X1,
arrspec: None,
},
Imm64 {
imm: Unsigned(
0x41,
),
shift: None,
},
],
flags_set: None,
}
add x0, x1, #0x41
```