https://github.com/zephray/vb-gfmpw0

https://github.com/zephray/vb-gfmpw0

Last synced: 4 months ago
JSON representation

• Host: GitHub
• URL: https://github.com/zephray/vb-gfmpw0
• Owner: zephray
• License: apache-2.0
• Created: 2022-11-24T19:05:22.000Z (over 3 years ago)
• Default Branch: vb
• Last Pushed: 2023-08-01T14:14:19.000Z (almost 3 years ago)
• Last Synced: 2025-03-17T11:01:58.456Z (about 1 year ago)
• Language: Verilog
• Size: 157 MB
• Stars: 1
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

Awesome Lists containing this project

README

          
# VerilogBoy GFMPW0

Uses VerilogBoy design from https://github.com/zephray/VerilogBoy.

VerilogBoy is a GameBoy-compatible system design in synthesizable Verilog RTL. The submission for GFMPW0 includes the following components:

- SM83 (GBZ80) CPU core

- Pixel processing unit

- Programmable sound generator

- Timer

- Stereo PDM audio output

To form a complete GB system, users need to provide the following additional components:

- Generic 16KB Async SRAM

- Some buttons for input

- 160x144 LCD

- Low pass filter and audio amplifier

- Unmodified GameBoy game cartridge

- Small amount of glue logic

The simtop.v maybe used as a reference on external components required.

A Verilator-based testbench is provided in verilog/sim.

## Implementation Results

The implementation has 43% ultilization of a 1.5mm x 1.5 mm core area. The Fmax is around 20MHz at typical corner, 3.3V with no hold violation. The design is supposed to run up to 4MHz at 5V.

## License

Unless otherwise stated, HDL codes are licensed under OHDL 1.0, and software codes are licensed under MIT.