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https://github.com/Nic30/hdlConvertor
Fast Verilog/VHDL parser preprocessor and code generator for C++/Python based on ANTLR4
antrl4 fpga parser python systemverilog systemverilog-parser verilog verilog-parser vhdl vhdl-parser
Last synced: 25 Jun 2024
![](https://github.com/Nic30.png)