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Projects in Awesome Lists tagged with intel-fpga

A curated list of projects in awesome lists tagged with intel-fpga .

https://github.com/spcl/hls_tutorial_examples

Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".

fpga high-level-synthesis hls intel-fpga opencl vivado-hls

Last synced: 19 Dec 2024

https://github.com/robseb/rsyocto

šŸ¤– SoCFPGA: Open-Source Embedded Linux Distribution with a highly flexible build system, developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)

arm-cortex-a9 armv7 arria10 build-automation build-system cyclone-v de10-nano de10-standard de10nano embedded-linux fpga fpga-configuration fpga-fabric intel intel-fpga intel-soc-fpgas linux soc-fpga-linux socfpga

Last synced: 08 Nov 2024

https://github.com/mbtaylor1982/resdmac

Verilog code to replace the Commodore SDMAC found in the A3000

altera-fpga amiga amiga-hardware intel-fpga kicad open-source quartus verilog

Last synced: 13 Dec 2024

https://github.com/robseb/hps2fpgamapping

SoCFPGA: Mapping HPS Peripherals, like IĀ²C or CAN, over the FPGA fabric to FPGA I/O and using embedded Linux to control them (Intel Cyclone V)

altera altera-fpga bootloader can-bus embedded-linux fpga fpga-configuration fpga-fabric fpga-soc hps intel intel-fpga linux mapping-hps-peripherals python-script quartus-prime rsyocto soc-fpga

Last synced: 08 Nov 2024

https://github.com/robseb/django2fpgademo

Demonstration how to build a Management Web interface to interact with the FPGA fabric and change the FPGA configuration with the Django Framework

adc altera cyclone-v de10-nano de10-standard de10nano django django-framework fpga-configuration fpga-data fpga-fabric intel-fpga rsyocto sensor-data soc-fpga

Last synced: 08 Nov 2024

https://github.com/robseb/socfpgaplatformgenerator

Script to build the bootloader (u-boot) and bring all components to a bootable image for Intel (ALTERA) SoC-FPGAs

arria10 build-automation cyclone-v intel-fpga linux-distribution quartus-prime sd-card-image soc-eds soc-fpgas u-boot

Last synced: 08 Nov 2024

https://github.com/robseb/rstoolsa10

Source Code of Yocto Layer for accessing FPGA Manager of the Intel (ALTERA) Arria 10 SX SoCFPGA

altera arria10 embedded fpga fpga-programming intel-fpga socfpga visual-studio

Last synced: 08 Nov 2024

https://github.com/robseb/niosii_eclipsecompproject

Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...

arria-v arria10 c custom-eclipse cyclone-v eclipse freertos intel intel-fpga intel-quartus-prime max10 nios-ii python-script quartus soc-fpga

Last synced: 08 Nov 2024

https://github.com/robseb/rstoolscy5

Source Code of Yocto Layer for accessing FPGA Manager of the Intel (ALTERA) Cyclone V SoCFPGA

altera cyclone-v embedded fpga fpga-programming intel intel-fpga socfpga visual-studio

Last synced: 08 Nov 2024