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Projects in Awesome Lists tagged with vpi

A curated list of projects in awesome lists tagged with vpi .

https://github.com/chipsalliance/surelog

SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

antlr antlr4-grammar elaboration linter parser parser-ast preprocessor python-api systemverilog uvm verilog vpi vpi-api vpi-standard

Last synced: 20 Dec 2024

https://github.com/chipsalliance/Surelog

SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

antlr antlr4-grammar elaboration linter parser parser-ast preprocessor python-api systemverilog uvm verilog vpi vpi-api vpi-standard

Last synced: 09 Nov 2024

https://github.com/semify-eda/fstdumper

Verilog VPI module to dump FST (Fast Signal Trace) databases

simulator systemverilog verilog vpi waveform

Last synced: 09 Nov 2024

https://github.com/chuckb/ghdl-interactive-sim

Interactive GHDL simulation of a VHDL adder using Python, Cocotb, and pygame

cocotb ghdl gui pygame python simulator vhdl vpi

Last synced: 20 Dec 2024

https://github.com/kaushalmodi/nim-systemverilog-vpi

Using Nim to interface with Verilog and SystemVerilog test benches via VPI

1364-2005 1800-2017 c cpp nim pli systemverilog verilog vpi

Last synced: 15 Nov 2024

https://github.com/donn/swiftlog

An IcarusVerilog VPI bridge for the Swift Programming Language.

pli swift verilog vpi

Last synced: 28 Nov 2024

https://github.com/kaushalmodi/nim-svvpi

Wrapper for SystemVerilog VPI headers sv_vpi_user.h and vpi_user.h

1364-2005 1800-2017 nim pli systemverilog verilog vpi

Last synced: 15 Nov 2024