Ecosyste.ms: Awesome
An open API service indexing awesome lists of open source software.
ASIC-Design-Roadmap
The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a concept to specification to tape-outs. Although the end product is typically quite small (measured in nanometers), this long journey is interesting and filled with many engineering challenges.
https://github.com/abdelazeem201/ASIC-Design-Roadmap
- Digital electronics - First of all I would like to tell you to build your basic concepts strong,which includes Digital electronics ,MOSFET,CMOS Design,FF ,Latches.
- CS221 digital design by Dr/Waleed Youssef - Digital System Design
- Hardware modeling using verilog by Dr/Indranil Sen Gupta - HDLs like Verilog, and several design techniques like timing, synthesis, logic circuits, state machines, pipelining, etc etc
- Digital Design and Computer Architecture - Digital Design and Computer Architecture
- Logic Synthesis - This course aims at imparting practical knowledge in Synthesis and Timing Closure. It also includes Synopsys DC and PT labs.
- Physical design and implementation - Physical design and implementation: In VLSI design flow after the front end logic design and verification is done, the backend or physical design flow is the next step in terms of mapping the design to technology. This involves the following steps majorly - Design Netlist (synthesis), Floorplanning, Partitioning, Placement, Clock tree synthesis, Routing, Physical Verification, and GDS Generation for tape out.).
- RTL2GDSII - cover the basics of Chip Implementation, from designing the logic (RTL) to providing a layout ready for fabrication (GDS).
- FPGA Tutorial
- Awesome Hardware Description Languages - hdl) - A curated list of amazingly awesome hardware description language projects.
- Awesome FPGA - fpga) - A collection of resources on FPGA devices and development in general.
- Open Hardware Verification - marshall/awesome-open-hardware-verification) - A curated List of Free and Open Source hardware verification tools and frameworks.
- Awesome Open Source EDA Projects - eda) - A curated list of EDA open source projects.
- List of FPGA boards - fpga-boards) - List of Repurposed FPGA boards.
- awesome-hwd-tools - hwd-tools) - A curated list of awesome open source hardware design tools with a focus on chip design.
- Awesome Electronics - electronics) - A curated list of awesome resources for electronic engineers and hobbyists.
- Awesome Lattice FPGA boards - latticeFPGAs) - A curated list of awesome open-source FPGA boards
- verilog - Here are 2,566 public repositories matching "verilog" topic...
- vhdl - Here are 1,766 public repositories matching "vhdl" topic...
- fpga - Here are 3,136 public repositories matching "fpga" topic...
- verilog - Here are 2,566 public repositories matching "verilog" topic...
- vhdl - Here are 1,766 public repositories matching "vhdl" topic...
- fpga - Here are 3,136 public repositories matching "fpga" topic...
- OpenCores - Free and open source IP cores.
- FreeCores - A home for open source hardware cores, a fork of almost all cores that was once on OpenCores.org.
- Must-have verilog systemverilog modules - A collection of verilog systemverilog synthesizable modules.
- fpga4fun - Some projects build on FPGA.
- 32 Verilog Mini Projects - Verilog-Mini-Projects) - 32 useful mini verilog projects for beginners.
- ALEX FORENCICH - Verilog IPs including PCIe/Ethernet/I2C/Uart etc.
- ALEX FORENCICH - AXI - axi) - Collection of AXI4 and AXI4 lite bus components. Most components are fully parametrizable in interface widths.
- TVIP - AXI - ishitani/tvip-axi) - An UVM package of AMBA AXI4 VIP.
- PULP-platform - AXI - platform/axi) - AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication.
- ALEX FORENCICH - AXIS - axis) - Collection of AXI Stream bus components. Most components are fully parametrizable in interface widths.
- ALEX FORENCICH - IIC - i2c) - I2C interface components. Includes full MyHDL testbench with intelligent bus cosimulation endpoints.
- corundum - NIC
- RIFFA - PCIe - Reusable Integration Framework for FPGA Acceleratorscommunication.
- ALEX FORENCICH - UART - uart) - A basic UART to AXI Stream IP core, written in Verilog with cocotb testbenches.
- zipcpu - UART - A simple, basic, formally verified UART controller.
- C910 - UART
- RISC-V Instruction Set Manual - This repository contains the LaTeX source for the draft RISC-V Instruction Set Manual.
- RISC-V Exchange: Cores & SoCs - A list of RICS-V cores and SoCs.
- PULP - Open source Parallel Ultra-Low-Power RISC-V core.
- openc910 - head-Semi/openc910) - OpenXuantie C910 Core.
- XiangShan - Open-source high-performance RISC-V processor.
- riscv-starship - zju/riscv-starship) - Run rocket-chip on FPGA(Xilinx Virtex-7 VC707).
- Wujian100 - head-Semi/wujian100_open) - A MCU base SoC.
- picorv32 - A Size-Optimized RISC-V CPU.
- Hummingbirdv2 E203 Core and SoC - mcu/e203_hbirdv2) [Docs](https://doc.nucleisys.com/hbirdv2/) - A Ultra-Low Power RISC-V Core.
- darkriscv - A proof of concept for the opensource RISC-V instruction set.
- CVA6 RISC-V CPU - An application class 6-stage RISC-V CPU capable of booting Linux.
- VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation.
- zipcpu - with detailed comments.
- openmsp430 - The openMSP430 is a synthesizable 16bit microcontroller core written in Verilog.
- Nyuzi Processor - GPGPU microprocessor architecture.
- zipcpu - with detailed comments.
- WORLD OF ASIC - A great source of detailed VLSI tutorials and examples.
- Awesome HDL
- Verilog TUTORIAL for beginners - A tutorial based upon free Icarus Verilog compiler.
- ChipVerify: Verilog Tutorial - A guide for someone new to Verilog.
- Verilog/SystemVerilog Guide - SystemVerilog-Guide) - A guide covering Verilog & SystemVerilog.
- VHDL Guide - Guide) - A guide covering VHDL.
- Verification Academy - The most comprehensive resource for verification training.
- Verification Guide - Tutorials with links to example codes on EDA Playground.
- Doulos - Global training solutions for engineers creating the world's electronics products.
- testbench - Some training articals for systemverilog.
- ClueLogic - Providing the clues to solve your verification problems.
- ChipVerify - A simple and complete set of verilog/System Verilog/UVM tutorials.
- RISC-V Guide - V-Guide) - A guide covering the RISC-V Architecture.
- ARM Guide - Guide) - A guide covering ARM architecture.
- nand2tetris - Build an advanced computer from nand gate.
- Building a RISC-V CPU Core - edX - Build a RISC-V cpu core. No prior knowledge of digital logic design is required.
- Build a Modern Computer from First Principles: From Nand to Tetris - coursera - Build a modern computer system.
- FPGA Tutorial
- Complex Programmable Logic Device (CPLD) Guide - Guide) - A guide covering CPLD.
- EDA Playground - Edit, save, simulate, synthesize SystemVerilog, Verilog, VHDL and other HDLs from your web browser.
- tree-core-ide - cpu/tree-core-ide)- A VSCode-based HDL extension.
- WaveDrom - Digital Timing Diagram everywhere
- Icarus Verilog - A Verilog simulation and synthesis tool.
- GTKWave - GTKWave is a fully featured GTK+ based wave viewer.
- OpenROAD - OpenROAD-Project/OpenROAD) - An RTL-to-GDS Flow
- Awesome Open Hardware Verification - Tools - hwd-tools)
- HDL bits - A collection of small circuit design exercises for practicing digital hardware design using Verilog Hardware Description Language (HDL).
- nowcoder - Verilog Part - A verilog oj platform.
Programming Languages
Keywords
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19
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awesome
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