https://github.com/PyHDI/PyCoRAM

Python-based Portable IP-core Synthesis Framework for FPGA-based Computing
https://github.com/PyHDI/PyCoRAM

Last synced: 21 days ago
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Python-based Portable IP-core Synthesis Framework for FPGA-based Computing

• Host: GitHub
• URL: https://github.com/PyHDI/PyCoRAM
• Owner: PyHDI
• License: other
• Created: 2013-12-02T18:43:30.000Z (over 10 years ago)
• Default Branch: master
• Last Pushed: 2016-11-21T09:03:54.000Z (over 7 years ago)
• Last Synced: 2024-04-27T04:41:05.652Z (2 months ago)
• Language: Python
• Homepage:
• Size: 35.4 MB
• Stars: 47
• Watchers: 12
• Forks: 8
• Open Issues: 2
• Metadata Files:
  • Readme: README.md
  • License: LICENSE.txt

Lists

• awesome-hdl - PyCoRAM - Python-based Portable IP-core Synthesis Framework for FPGA-based Computing. (Verilog-Toolkit)