https://github.com/AUCOHL/Fault

A complete open-source design-for-testing (DFT) Solution
https://github.com/AUCOHL/Fault

atpg dft eda fault-simulation jtag scan-chains stuck-at testing verilog verilog-hdl vlsi-cad

Last synced: 2 months ago
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A complete open-source design-for-testing (DFT) Solution

• Host: GitHub
• URL: https://github.com/AUCOHL/Fault
• Owner: AUCOHL
• License: apache-2.0
• Created: 2019-06-08T14:18:53.000Z (over 5 years ago)
• Default Branch: main
• Last Pushed: 2024-11-01T17:18:05.000Z (3 months ago)
• Last Synced: 2024-11-01T18:23:23.129Z (3 months ago)
• Topics: atpg, dft, eda, fault-simulation, jtag, scan-chains, stuck-at, testing, verilog, verilog-hdl, vlsi-cad
• Language: Swift
• Homepage:
• Size: 4.28 MB
• Stars: 135
• Watchers: 11
• Forks: 30
• Open Issues: 9
• Metadata Files:
  • Readme: Readme.md
  • Contributing: Contributing.md
  • License: License

Awesome Lists containing this project

• awesome-opensource-hardware - fault

README

        
🧪 Fault




  

  

  

   


Fault is a complete open source design for testing (DFT) Solution that includes automatic test pattern generation for netlists, scan chain stitching, synthesis scripts and a number of other convenience features.

![A flowchart demonstrating the Fault flow](./docs/flow.png)

# Installation and Usage

See the documentation at https://fault.readthedocs.io.

# Copyright & Licensing

All rights reserved ©2018-2024 The American University in Cairo and other contributors. Fault is available under the Apache 2.0 License: See `License`.

SOFTWARE INCLUDED WITH SOME FAULT DISTRIBUTIONS, I.E. ATALANTA AND PODEM, WHILE

FREE TO DISTRIBUTE, ARE PROPRIETARY, AND MAY NOT BE USED FOR COMMERCIAL

PURPOSES.

# References

- Z. Navabi, Digital System Test and Testable Design : Using Hdl Models and

  Architectures. 2010;2011;. DOI: 10.1007/978-1-4419-7548-5.

  [Book](https://ieeexplore.ieee.org/book/5266057)

- Shinya Takamaeda-Yamazaki: Pyverilog: A Python-based Hardware Design

  Processing Toolkit for Verilog HDL, 11th International Symposium on Applied

  Reconfigurable Computing (ARC 2015) (Poster), Lecture Notes in Computer

  Science, Vol.9040/2015, pp.451-460, April 2015.

  [Paper](http://link.springer.com/chapter/10.1007/978-3-319-16214-0_42)

# Publication(s)

- M. Abdelatty, M. Gaber, M. Shalan, "Fault: Open Source EDA’s Missing DFT

  Toolchain," IEEE Design & Test Magazine. April 2021.

  [Paper](https://ieeexplore.ieee.org/document/9324799)

- Mohamed Gaber, Manar Abdelatty, and Mohamed Shalan, "Fault, an Open Source DFT

  Toolchain," Article No.13, Workshop on Open-Source EDA Technology (WOSET),

  2019. [Paper](https://woset-workshop.github.io/PDFs/2019/a13.pdf)