https://github.com/YosysHQ/padring

A padring generator for ASICs
https://github.com/YosysHQ/padring

asic chip eda vlsi yosys

Last synced: 26 days ago
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A padring generator for ASICs

• Host: GitHub
• URL: https://github.com/YosysHQ/padring
• Owner: YosysHQ
• License: isc
• Created: 2019-04-19T12:04:57.000Z (over 5 years ago)
• Default Branch: master
• Last Pushed: 2023-05-17T15:44:06.000Z (over 1 year ago)
• Last Synced: 2024-11-13T04:24:49.796Z (about 1 month ago)
• Topics: asic, chip, eda, vlsi, yosys
• Language: C++
• Size: 177 KB
• Stars: 22
• Watchers: 9
• Forks: 8
• Open Issues: 3
• Metadata Files:
  • Readme: README.md
  • Changelog: CHANGELOG.md
  • License: License.txt

Awesome Lists containing this project

• awesome-hwd-tools - YosysHQ/PADRING - A padring generator for asics (Full Custom Design / Verification)

README

        
# PADRING - a padring generator for ASICs

[![Build Status](http://api.cirrus-ci.com/github/YosysHQ/padring.svg)](https://cirrus-ci.com/github/YosysHQ/padring)

![](doc/padring.png)

This tool makes padrings for ASICs using a LEF file and a placement/configuration file.

The padrings can be output in GDS2, DEF and/or SVG format.

Check out the example in the `example` directory.

## Commandline options

* -h : show help.

* -L, --lef \ : mandatory, filename of LEF file that describes the ASIC cells.

* --svg \ : optional, filename of SVG to generate.

* --def \ : optional, filename of DEF to generate.

* --filler \ : optional, filler cell prefix string to use when searching for filler cells.

* -o, --output \ : optional, filename of GDS2 to generate.

The filler cells are auto-detected by the padring program. Should this process fail, the user can add an explicit prefix which will be used to find the filler cells.

Multiple LEF files can be specified. During loading, existing cells with the same name will be overwritten.

## Configuration file

The following commands are available:

#### DESIGN \ ;

* Sets the name of the design in the GDS2/DEF output file.

* Optional

* Default = PADRING

#### GRID \ ;

* Sets the placement grid size in microns.

* Optional

* Default = 1 micron

#### AREA \ \ ;

* Defines the chip size in microns.

* Mandatory

#### CORNER \ \ \ ;

* instance_name: name of the corner instance, i.e. corner_1.

* location: location of the corner, one of NE,SE,NW,SW.

* cell_name: name of corner cell from the cell library.

#### PAD \ \ [FLIP] \ ;

* instance_name: name of the pad instance, i.e. gpio_1.

* location: location of the pad, one of N,S,E,W.

* optional 'FLIP': flips cell in Y axis.

* cell_name: name of pad cell from the cell library.

#### SPACE \ ;

* space: the space between the preceeding and succeeding cell, in microns.

Space between the I/O pads is distributed evenly unless a specific space between two pads is specified directly using the SPACE command.

## Building

Dependencies:

* CMAKE 3.10 or better.

* Ninja build.

* C++17 capable compiler.

* Optionally: Doxygen.

Building:

* Run `bootstrap.sh` to initialize the CMAKE/Ninja build system.

* Run `ninja` from the build directory.