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https://github.com/addisonelliott/logifindfpgatest
This is a Quartus Prime FPGA project testing the functionality of the LogiFind Altera Cyclone IV EP4CE6E22C8N Development Board. This product can also be found on eBay where I bought it from. I hope to provide base code that will help others in their learning with this development board.
https://github.com/addisonelliott/logifindfpgatest
7-segment altera buzzer cyclone-iv easyfpga ep4ce6e22c8n fpga ir-receiver logifind nec-verilog pl2303 quartus-prime uart-verilog verilog verilog-hdl
Last synced: 15 days ago
JSON representation
This is a Quartus Prime FPGA project testing the functionality of the LogiFind Altera Cyclone IV EP4CE6E22C8N Development Board. This product can also be found on eBay where I bought it from. I hope to provide base code that will help others in their learning with this development board.
- Host: GitHub
- URL: https://github.com/addisonelliott/logifindfpgatest
- Owner: addisonElliott
- Created: 2017-02-21T17:46:59.000Z (almost 8 years ago)
- Default Branch: master
- Last Pushed: 2019-09-10T22:30:42.000Z (over 5 years ago)
- Last Synced: 2024-10-19T11:56:16.932Z (2 months ago)
- Topics: 7-segment, altera, buzzer, cyclone-iv, easyfpga, ep4ce6e22c8n, fpga, ir-receiver, logifind, nec-verilog, pl2303, quartus-prime, uart-verilog, verilog, verilog-hdl
- Language: Verilog
- Size: 1.7 MB
- Stars: 6
- Watchers: 3
- Forks: 3
- Open Issues: 0