https://github.com/bbangjee/cse3016_computer_science_lab
2024-2 컴퓨터공학실험II
https://github.com/bbangjee/cse3016_computer_science_lab
digital-logic fpga university-project verilog vivado
Last synced: 26 days ago
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2024-2 컴퓨터공학실험II
- Host: GitHub
- URL: https://github.com/bbangjee/cse3016_computer_science_lab
- Owner: bbangjee
- Created: 2025-07-08T03:23:42.000Z (11 months ago)
- Default Branch: main
- Last Pushed: 2025-07-08T03:46:26.000Z (11 months ago)
- Last Synced: 2026-05-03T12:47:16.394Z (26 days ago)
- Topics: digital-logic, fpga, university-project, verilog, vivado
- Language: Verilog
- Homepage:
- Size: 7.82 MB
- Stars: 0
- Watchers: 0
- Forks: 0
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
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README
# CSE3016 Computer Science Lab 2
서강대학교 컴퓨터공학과 컴퓨터공학실험2 과제 모음
## 📚 Course Information
- **Course Name**: CSE3016 Computer Science Lab 2 (컴퓨터공학실험2)
- **University**: Sogang University (서강대학교)
- **Department**: Computer Science & Engineering
- **Semester**: 2024
## 🛠️ Lab Topics
각 주차별로 다음과 같은 내용들을 다룹니다:
- **Week 01**: Vivado 기초
- **Week 02**: Verilog 문법
- **Week 03**: AND, OR, NOT gate
- **Week 04**: NAND, NOR, XOR, AOI gate
- **Week 05**: 드 모르간의 제1, 2 법칙과 Boolean 함수의 동작 확인 및 1 bit 비교기
- **Week 06**: half adder, full adder, half subtractor, full subtractor, code converter
- **Week 07**: parity checker(odd, even), parity generator(odd, even), two bit comparator(odd, even)
- **Week 08**: segment display
- **Week 09**: 2-to-4 decoder, 4-to-2 encoder, BCD-to-Decimal, 4-to-1 MUX, 1-to-4 deMUX, 4-to-16 decoder
- **Week 10**: parallel adder, parallel subtractor, bcd adder
- **Week 11**: d_ff, rs_ff_nand, rs_ff_nor
- **Week 12**: 2 bit counter, 4bit decade counter, 4bit 2421 decade counter
- **Week 13**: ring counter, shift register, updown counter
- **Week 14**: moore machine, mealy machine
## ⚠️ Notice
Week 03: Source files (xdc, testbench, design) are missing.
보고서 관련 참고 사항: 13주차 예비보고서 (-1점), 8주차 결과보고서 (-2점), 2주차 결과보고서 (-3점)
## 📋 Files Included
각 주차 폴더에는 다음 파일들이 포함되어 있습니다:
- `.xdc` files (제약 조건 파일)
- Testbench files (시뮬레이션용)
- Design files (설계 파일)
- 실험 보고서 및 문서
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