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https://github.com/ben-marshall/croyde-riscv
A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.
https://github.com/ben-marshall/croyde-riscv
cpu crypto cryptography formal-verification micro-controller microcontroller mit-license risc risc-v riscv64 systemverilog verilator verilog yosys
Last synced: about 2 months ago
JSON representation
A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.
- Host: GitHub
- URL: https://github.com/ben-marshall/croyde-riscv
- Owner: ben-marshall
- License: mit
- Created: 2020-03-30T20:18:44.000Z (almost 5 years ago)
- Default Branch: master
- Last Pushed: 2022-01-31T09:21:35.000Z (almost 3 years ago)
- Last Synced: 2023-03-02T02:05:42.614Z (almost 2 years ago)
- Topics: cpu, crypto, cryptography, formal-verification, micro-controller, microcontroller, mit-license, risc, risc-v, riscv64, systemverilog, verilator, verilog, yosys
- Language: SystemVerilog
- Homepage:
- Size: 754 KB
- Stars: 21
- Watchers: 2
- Forks: 4
- Open Issues: 0