https://github.com/celebi-pkg/riscv-assembler

RISC-V Assembly code assembler package for Python.
https://github.com/celebi-pkg/riscv-assembler

assembler assembly instruction-set-architecture python risc-v riscv riscv-assembler

Last synced: 2 months ago
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RISC-V Assembly code assembler package for Python.

• Host: GitHub
• URL: https://github.com/celebi-pkg/riscv-assembler
• Owner: celebi-pkg
• License: mit
• Created: 2023-04-11T03:36:26.000Z (over 1 year ago)
• Default Branch: main
• Last Pushed: 2024-09-18T16:59:49.000Z (3 months ago)
• Last Synced: 2024-10-01T15:28:17.775Z (3 months ago)
• Topics: assembler, assembly, instruction-set-architecture, python, risc-v, riscv, riscv-assembler
• Language: Assembly
• Homepage: https://celebi-pkg.github.io/riscv-assembler/
• Size: 344 KB
• Stars: 17
• Watchers: 2
• Forks: 9
• Open Issues: 6
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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# riscv-assembler Documentation

RISC-V Assembly code assembler package. [View the full documentation here]([https://www.riscvassembler.org](https://celebi-pkg.github.io/riscv-assembler/))

This package contains tools and functions that can convert **RISC-V Assembly code to machine code**. The whole process is implemented using Python purely for understandability, less so for efficiency in computation. These tools can be used to **convert given lines of code or [whole files](#convert) to machine code**. For conversion, output file types are binary, text files, and printing to console. The supported instruction types are **R, I, S, SB, U, and UJ**. Almost all standard instructions are supported, most pseudo instructions are also supported.

Feel free to open an issue or contact me at [[email protected]](mailto:[email protected]?subject=[GitHub]%20riscv-assembler) with any questions/inquiries.

# Installation

The package can be installed using pip:

    $ pip install riscv-assembler

If issues arise try:

    $ python3 -m pip install riscv-assembler