https://github.com/chili-chips-ba/wireguard-fpga

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!
https://github.com/chili-chips-ba/wireguard-fpga

cocotb embedded fpga iss risc-v rtl verilator verilog vpn vproc wireguard

Last synced: 13 days ago
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Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!

• Host: GitHub
• URL: https://github.com/chili-chips-ba/wireguard-fpga
• Owner: chili-chips-ba
• License: bsd-3-clause
• Created: 2024-07-13T21:31:54.000Z (2 months ago)
• Default Branch: main
• Last Pushed: 2024-07-25T17:08:14.000Z (about 2 months ago)
• Last Synced: 2024-07-25T22:46:45.725Z (about 2 months ago)
• Topics: cocotb, embedded, fpga, iss, risc-v, rtl, verilator, verilog, vpn, vproc, wireguard
• Language: SystemVerilog
• Homepage: https://nlnet.nl/project/KlusterLab-Wireguard
• Size: 1.72 GB
• Stars: 21
• Watchers: 6
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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