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https://github.com/chipsalliance/f4pga-examples

Example designs showing different ways to use F4PGA toolchains.
https://github.com/chipsalliance/f4pga-examples

conda-packages f4pga fpga fpga-designs litex symbiflow-toolchains verilog vexriscv

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Example designs showing different ways to use F4PGA toolchains.

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# F4PGA examples



'Doc' workflow status

This repository provides example FPGA designs that can be built using the F4PGA open source toolchain.
These examples target the Xilinx 7-Series and the QuickLogic EOS S3 devices.

* Please refer to the [![](https://img.shields.io/website?longCache=true&style=flat-square&label=Documentation%20For%20Users&up_color=231f20&up_message=%E2%9E%9A&url=https%3A%2F%2Ff4pga-examples.readthedocs.io%2Fen%2Flatest%2Findex.html&labelColor=fff)](https://f4pga-examples.readthedocs.io)
for a proper guide on how to run these examples, as well as instructions on how to build and compile your own HDL designs using
the F4PGA toolchain.
* See [![](https://img.shields.io/website?longCache=true&style=flat-square&label=Documentation%20For%20Developers&up_color=white&up_message=%E2%9E%9A&url=https%3A%2F%2Ff4pga.readthedocs.io%2Fprojects%2Farch-defs%2Fen%2Flatest%2Findex.html&labelColor=231f20)](https://f4pga.readthedocs.io/projects/arch-defs/)
to contribute on the development of architecture support in F4PGA.

The repository includes:

* [xc7/](./xc7) and [eos-s3/](./eos-s3) - Examples for Xilinx 7-Series and EOS-S3 devices, including:

* Verilog code

* Pin constraints files

* Timing constraints files

* Makefiles for running the F4PGA toolchain

* [docs/](./docs) - Guide on how to get started with F4PGA and build provided examples

* [.github/](./.github) - Directory with CI configuration and scripts

The examples provided in this repository are automatically built and tested in CI by extracting necessary code snippets
with [tuttest](https://github.com/antmicro/tuttest).