https://github.com/choaib-elmadi/getting-started-with-vhdl

Getting started with VHDL: Very High Speed Integrated Circuit Hardware Description Language.
https://github.com/choaib-elmadi/getting-started-with-vhdl

circuit design digital fpga fpga-board fpga-programming fpga-soc hdl vhdl vhdl-code vhdl-examples

Last synced: about 1 month ago
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Getting started with VHDL: Very High Speed Integrated Circuit Hardware Description Language.

• Host: GitHub
• URL: https://github.com/choaib-elmadi/getting-started-with-vhdl
• Owner: Choaib-ELMADI
• Created: 2024-09-15T16:52:46.000Z (7 months ago)
• Default Branch: master
• Last Pushed: 2025-02-28T19:35:13.000Z (about 2 months ago)
• Last Synced: 2025-02-28T20:50:35.863Z (about 2 months ago)
• Topics: circuit, design, digital, fpga, fpga-board, fpga-programming, fpga-soc, hdl, vhdl, vhdl-code, vhdl-examples
• Language: VHDL
• Homepage:
• Size: 38.5 MB
• Stars: 6
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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# Getting Started with VHDL

VHDL stands for `Very High Speed Integrated Circuit Hardware Description Language`, and it's a hardware description language used for designing physical, digital circuits. The word `hardware` refers to the computer hardware, and more specifically integrated circuits such as the CPU.



![What is VHDL](./Images/what-is-vhdl.png)



## VHDL Workflow

The process of running VHDL code involves several steps:

1. **Synthesis**: After engineers write the code using a hardware description language, it is processed by a tool, `similar to a compiler`, to generate a synthesized circuit netlist. Netlists are made up of components and their connections. Components like resistors or transistors are listed, along with how their terminals (pins) are connected through specific signal paths called nets.

2. **Place and Route**: Here, the netlist is processed by a tool that maps the circuit to the physical resources of the target architecture, determining the placement of components and routing the connections between them.



![VHDL Processing](./Images/vhdl-workflow.png)



## Used Tools

To run and simulate VHDL code, you will need the following tools. Below are links to install them:

- **ModelSim**: A logic simulation tool - [Download link](https://www.intel.com/content/www/us/en/software-kit/660907/intel-quartus-prime-lite-edition-design-software-version-20-1-1-for-windows.html):

  - Select: **Individual Files**

  - Under **Intel® Quartus® Software**, download: **ModelSim-Intel® FPGA Edition (includes Starter Edition)**

- **Quartus Prime Lite**: An FPGA synthesis / implementation tool - [Download link](https://www.intel.com/content/www/us/en/software-kit/825278/intel-quartus-prime-lite-edition-design-software-version-23-1-1-for-windows.html):

  - Select: **Individual Files**

  - Under **Intel® Quartus® Software**, download: **Quartus® Prime (includes Nios II EDS)**

- **MAX10 Device Files**: MAX10 FPGA device information - [Download link](https://www.intel.com/content/www/us/en/software-kit/825278/intel-quartus-prime-lite-edition-design-software-version-23-1-1-for-windows.html):

  - Select: **Individual Files**

  - Under **Devices**, download: **MAX® 10 FPGA device support**

Place all the downloaded files in the same directory, then launch `Quartus Prime Lite` and `ModelSim` to begin your workflow.

## How to Use Simulation Tools

Once you have installed **ModelSim** and **Quartus Prime Lite**, you can follow the guides below to learn how to set up and run simulations:

- **Using ModelSim**: [Step-by-step guide](./Projects/ModelSim/README.md)

- **Using Quartus Prime Lite**: [Step-by-step guide](./Projects/Quartus/README.md)

These guides cover how to:

- Set up a VHDL project

- Write and compile testbenches

- Run simulations and analyze waveforms