https://github.com/dawsonjon/chips_v
RISC-V System on Chip Builder
https://github.com/dawsonjon/chips_v
c chip-builder chips embedded fpga fpga-soc python risc-v riscv soc verilog
Last synced: 2 months ago
JSON representation
RISC-V System on Chip Builder
- Host: GitHub
- URL: https://github.com/dawsonjon/chips_v
- Owner: dawsonjon
- License: mit
- Created: 2020-09-15T17:31:19.000Z (about 5 years ago)
- Default Branch: master
- Last Pushed: 2020-09-27T16:29:29.000Z (about 5 years ago)
- Last Synced: 2023-03-13T22:20:15.918Z (over 2 years ago)
- Topics: c, chip-builder, chips, embedded, fpga, fpga-soc, python, risc-v, riscv, soc, verilog
- Language: Verilog
- Homepage:
- Size: 1.07 MB
- Stars: 7
- Watchers: 3
- Forks: 2
- Open Issues: 0