https://github.com/feilongfl/chisel_gowin_mcu
This project helps developers create FPGA based systems with zephyr rtos.The goal of this project is to build Zephyr RTOS in a way similar to Xilinx's PetaLinux workflow.
https://github.com/feilongfl/chisel_gowin_mcu
chisel fpga zephyr
Last synced: about 1 month ago
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This project helps developers create FPGA based systems with zephyr rtos.The goal of this project is to build Zephyr RTOS in a way similar to Xilinx's PetaLinux workflow.
- Host: GitHub
- URL: https://github.com/feilongfl/chisel_gowin_mcu
- Owner: feilongfl
- License: apache-2.0
- Created: 2022-08-21T00:09:40.000Z (over 3 years ago)
- Default Branch: main
- Last Pushed: 2023-02-13T22:46:48.000Z (about 3 years ago)
- Last Synced: 2025-10-28T15:59:36.867Z (5 months ago)
- Topics: chisel, fpga, zephyr
- Language: Verilog
- Homepage:
- Size: 3.24 MB
- Stars: 0
- Watchers: 1
- Forks: 0
- Open Issues: 0