https://github.com/hdl-registers/hdl-registers

An open-source HDL register code generator fast enough to run in real time.
https://github.com/hdl-registers/hdl-registers

asic axi axi-lite c cplusplus csr eda fpga generator html python register register-interface rtl vhdl

Last synced: 8 months ago
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An open-source HDL register code generator fast enough to run in real time.

• Host: GitHub
• URL: https://github.com/hdl-registers/hdl-registers
• Owner: hdl-registers
• License: bsd-3-clause
• Created: 2023-11-29T08:52:56.000Z (about 2 years ago)
• Default Branch: main
• Last Pushed: 2024-05-29T08:17:12.000Z (over 1 year ago)
• Last Synced: 2024-05-29T20:54:20.453Z (over 1 year ago)
• Topics: asic, axi, axi-lite, c, cplusplus, csr, eda, fpga, generator, html, python, register, register-interface, rtl, vhdl
• Language: Python
• Homepage: https://hdl-registers.com/
• Size: 1.69 MB
• Stars: 22
• Watchers: 1
• Forks: 2
• Open Issues: 11
• Metadata Files:
  • Readme: readme.rst
  • License: license.txt

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• awesome-opensource-hardware - hdl-registers

README

          
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The hdl-registers project is an open-source HDL register interface code generator fast enough to run

in real time.

It makes FPGA/ASIC development more fun by automating a lot of time-consuming manual work.

It also minimizes the risk of bugs by removing the need for duplicate information.

`Read more `_

**See documentation on the website**: https://hdl-registers.com

The following features are supported:

* Register fields

  * `Bit `_.

  * `Signed/unsigned fixed-point bit vector `_.

  * `Enumeration `_.

  * `Positive/negative-range integer `_.

* `Register arrays `_.

* `Default registers `_.

* `Register constants `_.

Registers can be defined using

a `TOML/JSON/YAML data file `_

or the `Python API `_.

The following code can be generated:

* `VHDL `_

  * AXI-Lite register file wrapper using records and native VHDL types for values.

  * Simulation support packages for compact read/write/wait/checking of register and field values.

* `SystemVerilog `_

  * AXI-Lite register file using structures and native types to represent field values.

* `C++ `_

  * Complete class with setters and getters for registers and fields.

    Uses structs and native C++ representation of values.

  * Includes an abstract interface header for unit test mocking.

* `C header `_

  with register addresses and field information.

* `HTML `_

  website with documentation of registers and fields.

* `Python `_

  class with methods to read/write/print each register and field on a target device.

The tool can also be extended by

`writing your own code generator `_

using a simple but powerful API.

This project is mature and used in many production environments.

The maintainers place high focus on quality, with everything having good unit test coverage and a

thought-out structure.