https://github.com/hukenovs/fp32_logic
Floating point FP32 core HDL. For Xilinx FPGAs. Include base converters and some math functions.
https://github.com/hukenovs/fp32_logic
altera digital-signal-processing dsp floating-point fpga ieee-754 ieee754 integer-arithmetic verilog vhdl xilinx
Last synced: 2 months ago
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Floating point FP32 core HDL. For Xilinx FPGAs. Include base converters and some math functions.
- Host: GitHub
- URL: https://github.com/hukenovs/fp32_logic
- Owner: hukenovs
- Created: 2018-08-15T10:49:00.000Z (almost 7 years ago)
- Default Branch: master
- Last Pushed: 2018-10-17T11:50:00.000Z (over 6 years ago)
- Last Synced: 2025-01-20T13:44:27.045Z (4 months ago)
- Topics: altera, digital-signal-processing, dsp, floating-point, fpga, ieee-754, ieee754, integer-arithmetic, verilog, vhdl, xilinx
- Language: VHDL
- Size: 26.4 KB
- Stars: 9
- Watchers: 4
- Forks: 3
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
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README
# fp32_logic
Floating point FP32 (same as IEEE-754 w/ some diffs) core HDL. For Xilinx FPGAs. Include base converters and some math functions.
Supported families: **Xilinx 6/7 series, Ultrascale, US+**.
Source files: **VHDL**
FP WORD 32-bit vector:
EXPONENT - 8-bits.
SIGN - 1-bit
MANTISSA - 24+1 bits.
'1' means hidden one for normalized floating-point values;
Math:
**A = (-1)^sign(A) * 2^(exp(A)-63) * mant(A)**
Component list:
* _fp32_fix2float_ - convert data from INT32 to FP32.
* _fp32_float2fix_ - convert data from FP32 to INT32.
* _fp32_addsub_ - floating point adder.
* _fp32_mult_ - floating point multiplier.