https://github.com/hvardhan1437/eoc-assignment-4
Implementation of digital logic circuits for EOC Assignment 4 using HDL-style modules, based on the Nand2Tetris curriculum. Includes gates, multiplexers, demultiplexers, and adders.
https://github.com/hvardhan1437/eoc-assignment-4
adder-circuits combinational-logic demultiplexer digital-logic elements-of-computing-systems full-adder half-adder hdl logic-gates multiplexer nand2tetris
Last synced: 9 months ago
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Implementation of digital logic circuits for EOC Assignment 4 using HDL-style modules, based on the Nand2Tetris curriculum. Includes gates, multiplexers, demultiplexers, and adders.
- Host: GitHub
- URL: https://github.com/hvardhan1437/eoc-assignment-4
- Owner: hvardhan1437
- Created: 2022-12-30T17:52:08.000Z (over 3 years ago)
- Default Branch: main
- Last Pushed: 2025-04-22T12:17:46.000Z (about 1 year ago)
- Last Synced: 2025-05-29T15:57:07.329Z (about 1 year ago)
- Topics: adder-circuits, combinational-logic, demultiplexer, digital-logic, elements-of-computing-systems, full-adder, half-adder, hdl, logic-gates, multiplexer, nand2tetris
- Language: MATLAB
- Homepage:
- Size: 3.91 KB
- Stars: 0
- Watchers: 0
- Forks: 0
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
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README
# 💻 EOC Assignment 4 – Elements of Computing Systems
This repository contains the implementation for Assignment 4 of the subject Elements of Computing Systems. It focuses on designing and simulating key digital logic components using a minimalist hardware description style inspired by the Nand2Tetris curriculum.
# 📁 Repository Contents
->HDL-style logic modules implemented as .m files
->Custom-built logic gates and combinational components:
* AND, OR, NOT gates
* Multiplexers (2:1, 4:1, 8:1)
* Demultiplexers (1:2, 1:4)
* Adders (Half Adder, Full Adder, 4-bit Adder)