https://github.com/jeanthom/gram

DDR3 controller for nMigen (WIP)
https://github.com/jeanthom/gram

ddr3 ecp5 fpga nmigen ram trellis

Last synced: 3 months ago
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DDR3 controller for nMigen (WIP)

• Host: GitHub
• URL: https://github.com/jeanthom/gram
• Owner: jeanthom
• License: other
• Created: 2020-06-03T18:57:48.000Z (over 5 years ago)
• Default Branch: master
• Last Pushed: 2023-12-25T10:25:29.000Z (almost 2 years ago)
• Last Synced: 2025-04-09T16:51:18.106Z (6 months ago)
• Topics: ddr3, ecp5, fpga, nmigen, ram, trellis
• Language: Python
• Homepage:
• Size: 520 KB
• Stars: 14
• Watchers: 5
• Forks: 1
• Open Issues: 12
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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README

          
# gram

[![builds.sr.ht status](https://builds.sr.ht/~macbook/gram.svg)](https://builds.sr.ht/~macbook/gram?)

gram is an nMigen+LambdaSoC port of the [LiteDRAM](https://github.com/enjoy-digital/litedram) core by [enjoy-digital](http://www.enjoy-digital.fr/). It currently only targets ECP5+DDR3.

gram is a [LambdaConcept](https://lambdaconcept.com) project.

## Requirements

nMigen + nMigen-SoC + LambdaSoC

gram requires nMigen >= 0.3.

## License

2-clause BSD.