https://github.com/jjunac/InterpreterAsm

Compile ASM files into file that can be interpreted byt the microprocessor built during the "Program Execution" course
https://github.com/jjunac/InterpreterAsm

Last synced: 2 months ago
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Compile ASM files into file that can be interpreted byt the microprocessor built during the "Program Execution" course

• Host: GitHub
• URL: https://github.com/jjunac/InterpreterAsm
• Owner: jjunac
• Created: 2016-12-01T09:54:40.000Z (about 8 years ago)
• Default Branch: master
• Last Pushed: 2017-01-05T10:53:46.000Z (about 8 years ago)
• Last Synced: 2024-04-24T16:41:47.883Z (9 months ago)
• Language: C
• Homepage:
• Size: 40 KB
• Stars: 0
• Watchers: 1
• Forks: 1
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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• AwesomeInterpreter - InterpreterAsm

README

        
# Utilisation

Transforme les fichiers ASM en fichier qui peuvent etre ouvert par le micro-processeur.

  

```batch

InterpreteurAsm.exe src dst

```

# Instructions ARM

* \#0: an immediate value to be used by the operation

* Rd: destination register

* Rm: register that contains the first operande

* Rn: register that contains the second operande (also destination register when 'Rdn')

### Data Processing

OP |Instruction				|OPTYPE|OPCODE	|XXX|XXX|Encoding

---|------------------------|------|--------|---|---|--------

AND|Bitwise AND				|010000|0000	|Rm |Rdn|AND \,\

EOR|Exclusive OR			|010000|0001	|Rm |Rdn|EOR \,\

LSL|Logical Shift Left		|010000|0010	|Rm |Rdn|LSL \,\

LSR|Logical Shift Right		|010000|0011	|Rm |Rdn|LSR \,\

ASR|Arithmetic Shift Right	|010000|0100	|Rm |Rdn|ASR \,\

ADC|Add with Carry			|010000|0101	|Rm |Rdn|ADC \,\

SBC|Substract with Carry	|010000|0110	|Rm |Rdn|SBC \,\

ROR|Rotate Right			|010000|0111	|Rm |Rdn|ROR \,\

TST|Test					|010000|1000	|Rm |Rn |TST \,\

RSB|Reverse Substract		|010000|1001	|Rn |Rd |RSB \,\,\#0

CMP|Compare Registers		|010000|1010	|Rm |Rn |CMP \,\

CMN|Compare Negative		|010000|1011	|Rm |Rn |CMN \,\

ORR|Logical OR				|010000|1100	|Rm |Rdn|ORR \,\

MUL|Multiply				|010000|1101	|Rn |Rdm|MUL \,\,\

BIC|Bit Clear				|010000|1110	|Rm |Rdn|BIC \,\

MVN|Bitwise NOT				|010000|1111	|Rm |Rd |MVN \,\

### Shift, add, sub, move

OP	|Instruction						|XXX	|XX	|XX		|X		|XX		|XXX|XXX|Encoding

----|-----------------------------------|-------|---|-------|-------|-------|---|---|--------

LSL	|Logical Shift Left (immediate)		|000	|00	|\#imm5	|_		|_		|Rm |Rd |LSL \,\,\#imm5

LSR	|Logical Shift Right (immediate)	|000	|01	|\#imm5	|_		|_		|Rm |Rd |LSR \,\,\#imm5

ASR	|Arithmetic Shift Right (immediate)	|000	|10	|\#imm5	|_		|_		|Rm |Rd |ASR \,\,\#imm5

ADD	|Add (register)						|000	|11	|00		|Rm		|_		|Rn |Rd |ADD \,\,\

SUB	|Substract (register)				|000	|11	|01		|Rm		|_		|Rn |Rd |SUB \,\,\

MOV	|Move (immediate)					|001	|00	|Rd		|_		|\#imm8	|_	|_	|MOV \,\#imm8

### Load, Store

OP |Instruction					|XXXXX|XXXXX	|XXX|XXX|Encoding

---|----------------------------|-----|---------|---|---|--------

STR|Store Register (immediate)	|01100|\#imm5	|Rn	|Rt	|STR \, \[\, \#imm5\]

LDR|Load Register (immediate)	|01101|\#imm5	|Rn |Rt |LDR \, \[\, \#imm5\]

### Branch

*  cannot be omitted !

* imm32 = SignExtend(imm8:'0', 32)

* imm32 is the Program Counter value of the label in the program. imm8 must be encoded to set the correct value for imm32.

OP |Instruction	|XXXX|XXXX|XXXXXXXX	|Encoding

---|------------|----|----|---------|--------

B  |Branch		|1101|cond|\#imm8	|B\ \