https://github.com/lazyoracle/vhdl-processor
An 8-bit processor in VHDL based on a simple instruction set
https://github.com/lazyoracle/vhdl-processor
altera-fpga digital-electronics fpga hardware-description-language hardware-designs hdl processor processor-architecture processor-design processor-simulator verilog vhdl vivado xilinx-fpga
Last synced: 20 days ago
JSON representation
An 8-bit processor in VHDL based on a simple instruction set
- Host: GitHub
- URL: https://github.com/lazyoracle/vhdl-processor
- Owner: lazyoracle
- Created: 2017-12-16T14:28:30.000Z (about 8 years ago)
- Default Branch: master
- Last Pushed: 2019-03-07T14:08:30.000Z (almost 7 years ago)
- Last Synced: 2024-06-13T10:06:23.333Z (over 1 year ago)
- Topics: altera-fpga, digital-electronics, fpga, hardware-description-language, hardware-designs, hdl, processor, processor-architecture, processor-design, processor-simulator, verilog, vhdl, vivado, xilinx-fpga
- Language: VHDL
- Size: 209 KB
- Stars: 5
- Watchers: 1
- Forks: 0
- Open Issues: 0