https://github.com/mattvenn/fpga-dvid-ice
https://github.com/mattvenn/fpga-dvid-ice
Last synced: about 2 months ago
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- Host: GitHub
- URL: https://github.com/mattvenn/fpga-dvid-ice
- Owner: mattvenn
- Created: 2017-01-31T13:26:56.000Z (over 8 years ago)
- Default Branch: master
- Last Pushed: 2017-02-24T18:46:51.000Z (about 8 years ago)
- Last Synced: 2025-04-01T18:09:54.134Z (about 2 months ago)
- Language: Verilog
- Size: 250 KB
- Stars: 10
- Watchers: 5
- Forks: 2
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
Awesome Lists containing this project
README
# DVI-D in Verilog use IceStorm open tools
Minimal DVI-D output based on Mike Field's work (see credits below).
TMDS output is not supported by the lattice chip on the icestick and mystorm
boards. Unable to get good enough signals with a breadboard so [made a
PCB](https://github.com/mattvenn/kicad/tree/master/dvi-pmod) which shows
promise.[pictures](https://goo.gl/photos/ScRRi142sbwstPGr6)
# Current status
* green screen output 640 x 480 @ 60Hz!
* test patterns have some problems - unsure what is happening
* very unstable - small changes to vga timings have big effects
* 'converting' LVDS to TMDS with [resistors and capacitors](https://github.com/mattvenn/kicad/tree/master/dvi-pmod)## GTKwave traces
I think these show that the verilog is correct, at least it is what I expect.
Shows correct TMDS symbols for blanking

Shows correct TMDS for hsync

Shows correct TMDS for RGB = 000, 001, 111.

## Scope pics
Following pics are with the x5 clock for DVI output set to 50MHz (target is
200MHz). Top 4 traces are Clock, R, G, B. Bottom 5 traces are 12MHz clock, DVI
clock (50MHz), VGA clock (10MHz), blank, vsync, hsync.Hsync and Vsync zoomed out

Hsync zoomed in

I can just about read the lines, it would be good to see the logic levels
recovered by the monitor when adding the negative sides of the signals.## Electrical connections
* Breadboarded version [current messy
status](https://goo.gl/photos/bQrL8b5GGyBhnb3S8) didn't work.
* New PMOD DVID PCB shows promise.# Resources / Credits
lots of thanks to Mike Field of [hamsterworks](http://hamsterworks.co.nz) for
great resources on dvi and vga. Here are some resources I've used in developing
this project.* http://hamsterworks.co.nz/mediawiki/index.php/VGA_timings
* http://hamsterworks.co.nz/mediawiki/index.php/FPGA_VGA
* https://github.com/jeelabs/fpga/blob/master/quartus/vga1024/top.vga
* ice storm: http://www.clifford.at/icestorm/
* [TMDS/LVDS question](http://electronics.stackexchange.com/questions/130942/transmitting-hdmi-dvi-over-an-fpga-with-no-support-for-tmds) Link to silabs pdf shows a way to interface between LVDS and TMDS with R and 2xC