https://github.com/namn-grg/instruction-set-simulator

Mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent the processor's registers.
https://github.com/namn-grg/instruction-set-simulator

python3 simulator

Last synced: about 1 month ago
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Mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent the processor's registers.

• Host: GitHub
• URL: https://github.com/namn-grg/instruction-set-simulator
• Owner: namn-grg
• Created: 2022-08-09T19:20:12.000Z (over 2 years ago)
• Default Branch: main
• Last Pushed: 2022-08-09T19:44:19.000Z (over 2 years ago)
• Last Synced: 2023-04-27T21:49:15.809Z (over 1 year ago)
• Topics: python3, simulator
• Language: Python
• Homepage:
• Size: 155 KB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# Instruction-Set-Simulator

It mimics the behavior of a mainframe or microprocessor by "reading" instructions and maintaining internal variables which represent the processor's registers

and flags. This simulator has its own Instruction Set Architecture (ISA)  and it follow VON NEUMANN ARCHITECTURE 

**************************************************************************************************************************************************************

A synopsis of the ISA is given below (please read the pdf for the complete discription of the ISA)

The ISA has 7 general purpose registers and 1 flag register. The ISA supports an address size

of 8 bits, which is double byte addressable. Therefore, each address fetches two bytes of

data. This results in a total address space of 512 bytes. This ISA only supports whole

number arithmetic and also some floating point number arithmetic. 

If the subtraction results in a negative number; for example “3 - 4”, the reg

value will be set to 0 and overflow bit will be set. All the representations of the number are

hence unsigned.

The registers in assembly are named as R0, R1, R2, ... , R6 and FLAGS. Each register is 16

bits.

The floating point representaion is No sign bit, 3 exponent bit, 5 mantissa bit.

While doing floating point arithmetic in the registers, only the last 8 bits will be used in computations and initialization for the

floating-point numbers.

**************************************************************************************************************************************************************

There is a sample test case input file, you can take a look how input file look like and there is the correspoindig output file for the same. 

The output file keeps track of flags and values stored in registers after execution of every instruction. At the end of the execution there is a memory dump 

of 256 lines. Memory dump describes how variables and program are stored in the same memory.