https://github.com/nathsou/yodl
Yet anOther hardware Description Language
https://github.com/nathsou/yodl
chisel circuit firrtl fpga hardware-description-language hdl verilog
Last synced: about 1 month ago
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Yet anOther hardware Description Language
- Host: GitHub
- URL: https://github.com/nathsou/yodl
- Owner: nathsou
- License: apache-2.0
- Created: 2024-12-05T21:56:50.000Z (about 1 year ago)
- Default Branch: main
- Last Pushed: 2025-03-15T21:07:22.000Z (11 months ago)
- Last Synced: 2025-03-15T22:19:27.148Z (11 months ago)
- Topics: chisel, circuit, firrtl, fpga, hardware-description-language, hdl, verilog
- Language: MoonBit
- Homepage: https://nathsou.github.io/yodl/playground.html
- Size: 2.34 MB
- Stars: 0
- Watchers: 1
- Forks: 0
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
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README
# yodl
Yet anOther (hardware) Description Language

## Quick links
- [Documentation](https://nathsou.github.io/yodl/book/)
- [Playground](https://nathsou.github.io/yodl/playground.html)
# Installation
The JS build of Yodl can be installed from npm:
```bash
$ npm install --global yodl
```
To compile FIRRTL outputs to SystemVerilog, install [firtool](https://github.com/llvm/circt/releases/tag/firtool-1.129.0)
## Usage
```bash
$ yodl examples/Hello.yodl "write_firrtl Hello.fir"
$ firtool --format=fir --verilog Hello.fir -o Hello.sv
```
## Development
Install [Moonbit](https://www.moonbitlang.com/):
```bash
$ curl -fsSL https://cli.moonbitlang.com/install/unix.sh | bash -s '0.6.35+dd17327ed'
```
## Checklist
- [x] [FIRRTL](https://github.com/chipsalliance/firrtl-spec) export
- [x] Generic multi-port memories
- [x] Imports (TODO: unqualified imports)
- [x] Verilator + SDL graphics simulation example
- [x] Multi-dimensional vectors (uint<16>[4][8])
- [ ] Optional module parameters (and register initial value)
- [x] Arbitrary port types
- [x] Type parameters
- [x] External modules
- [ ] Source Maps
- [ ] Test Benches
- [X] FIRRTL to RTLIL backend to bypass SystemVerilog generation
- [ ] Language Server Protocol (LSP) support
- [ ] [KiCad schematics](https://dev-docs.kicad.org/en/file-formats/sexpr-schematic/index.html) export
- [x] Web tour/playground