https://github.com/patricnilackshan/nano-processor-design

Nano Processor capable of executing simple set of instructions: 4-bit Add/Subtract unit, 3-bit adder, 3-bit Program Counter, k-way b-bit multiplexers
https://github.com/patricnilackshan/nano-processor-design

Last synced: 7 days ago
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Nano Processor capable of executing simple set of instructions: 4-bit Add/Subtract unit, 3-bit adder, 3-bit Program Counter, k-way b-bit multiplexers

• Host: GitHub
• URL: https://github.com/patricnilackshan/nano-processor-design
• Owner: patricnilackshan
• Created: 2024-06-20T07:42:05.000Z (5 months ago)
• Default Branch: main
• Last Pushed: 2024-06-20T08:09:56.000Z (5 months ago)
• Last Synced: 2024-06-21T21:00:22.983Z (5 months ago)
• Language: Tcl
• Homepage:
• Size: 1.14 MB
• Stars: 0
• Watchers: 1
• Forks: 0
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
# Nano-Processor-Design

Nano Processor capable of executing simple set of instructions: 4-bit Add/Subtract unit , 3-bit adder, 3-bit Program Counter, k-way b-bit multiplexers

| Instruction | Description | Format (12-bit instruction) |

|-------------|-------------|-----------------------------|

| MOVI R, d | Move immediate value d to register R, i.e., R ← d 
R ∈ [0, 7], d ∈ [0, 15] | 1 0 R R R 0 0 0 d d d d |

| ADD Ra, Rb | Add values in registers Ra and Rb and store the result in Ra, i.e., Ra ← Ra + Rb 
Ra, Rb ∈ [0, 7] | 0 0 Ra Ra Ra Rb Rb Rb 0 0 0 0 |

| NEG R | 2’s complement of registers R, i.e., R ← −R 
R ∈ [0, 7] | 0 1 R R R 0 0 0 0 0 0 0 |

| JZR R, d | Jump if value in register R is 0, i.e., 
 If R == 0 
   PC ← d; 
 Else 
   PC ← PC + 1; 
R ∈ [0, 7], d ∈ [0, 7] | 1 1 R R R 0 0 0 0 d d d |







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## Import the `NanoProcessor_G39` folder in Vivado and Run the Simulations or Test it on **BASYS3**.

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