https://github.com/pseudoincorrect/fpga_mcu_wifi

Link between a PC and a FPGA through wifi
https://github.com/pseudoincorrect/fpga_mcu_wifi

c fpga socket verilog wifi

Last synced: about 2 months ago
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Link between a PC and a FPGA through wifi

• Host: GitHub
• URL: https://github.com/pseudoincorrect/fpga_mcu_wifi
• Owner: pseudoincorrect
• License: mit
• Created: 2017-07-05T12:34:26.000Z (over 7 years ago)
• Default Branch: master
• Last Pushed: 2021-04-13T14:28:14.000Z (almost 4 years ago)
• Last Synced: 2023-02-28T23:56:31.242Z (almost 2 years ago)
• Topics: c, fpga, socket, verilog, wifi
• Language: Verilog
• Homepage:
• Size: 8.66 MB
• Stars: 1
• Watchers: 2
• Forks: 1
• Open Issues: 0

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