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https://github.com/sadegh15khedry/vhdl-projects

This repository contains various VHDL projects showcasing digital logic circuits implemented using VHDL.
https://github.com/sadegh15khedry/vhdl-projects

and-gate c logical-gates nand-gate or-gate vhdl-code xor-gate

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This repository contains various VHDL projects showcasing digital logic circuits implemented using VHDL.

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# VHDL Projects

This repository contains various VHDL projects showcasing digital logic circuits implemented using VHDL.

## Projects

1. [NAND NAND Logic](https://github.com/sadegh15khedry/VHDLProjects/tree/master/NAND_NAND_Logic): Implements a digital logic circuit using NAND gates.
2. [NAND OR Negation Logic](https://github.com/sadegh15khedry/VHDLProjects/tree/master/NAND_OR_Negation_Logic): Implements a digital logic circuit using NAND, OR, and NOT gates.
3. [XOR AND Gate Simulator](https://github.com/sadegh15khedry/VHDLProjects/tree/master/XOR_AND_Gate_Simulator): Simulates the behavior of XOR and AND gates.
4. [NAND Gate](https://github.com/sadegh15khedry/VHDLProjects/tree/master/nand): Implements a digital logic circuit using NAND gates.
5. [OR Gate](https://github.com/sadegh15khedry/VHDLProjects/tree/master/or): Implements a digital logic circuit using OR gates.

Each project contains VHDL code for the corresponding digital logic circuit along with testbench files to verify functionality.

## License

This repository is licensed under the MIT License - see the [LICENSE](LICENSE) file for details.