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https://github.com/samiyaalizaidi/equalizer
Fixed Point FPGA-based Hardware Implementation of a 32-tap Low Pass FIR Filter for Audio Applications
https://github.com/samiyaalizaidi/equalizer
digital-signal-processing digital-system-design fir-filters
Last synced: about 2 months ago
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Fixed Point FPGA-based Hardware Implementation of a 32-tap Low Pass FIR Filter for Audio Applications
- Host: GitHub
- URL: https://github.com/samiyaalizaidi/equalizer
- Owner: samiyaalizaidi
- Created: 2024-05-18T09:53:11.000Z (8 months ago)
- Default Branch: main
- Last Pushed: 2024-05-22T15:36:34.000Z (8 months ago)
- Last Synced: 2024-05-23T08:39:11.015Z (7 months ago)
- Topics: digital-signal-processing, digital-system-design, fir-filters
- Language: Verilog
- Homepage:
- Size: 515 KB
- Stars: 1
- Watchers: 1
- Forks: 0
- Open Issues: 0