https://github.com/sathyasris27/vlsi_design
Repository containing the simulated schematics of logic gates, counters, adders and registers along with corresponding layouts for semiconductor design.
https://github.com/sathyasris27/vlsi_design
boolean-logic circuits counters semiconductors vlsi-design
Last synced: 3 months ago
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Repository containing the simulated schematics of logic gates, counters, adders and registers along with corresponding layouts for semiconductor design.
- Host: GitHub
- URL: https://github.com/sathyasris27/vlsi_design
- Owner: SathyasriS27
- Created: 2021-04-01T18:11:43.000Z (about 4 years ago)
- Default Branch: main
- Last Pushed: 2021-09-01T17:58:13.000Z (over 3 years ago)
- Last Synced: 2025-01-10T17:53:41.459Z (4 months ago)
- Topics: boolean-logic, circuits, counters, semiconductors, vlsi-design
- Homepage:
- Size: 71.3 KB
- Stars: 3
- Watchers: 1
- Forks: 0
- Open Issues: 0
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Metadata Files:
- Readme: README.md
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README
# **VLSI Design**
Repository containing the simulated schematics of logic gates, counters, adders and registers along with corresponding layouts for semiconductor design.
All files have been compiled and tested using `DSCH2.exe` (for schematics) and `Microwind2.exe` (for semiconductor layout design).
## **Designed Schematics and Layouts:**
1. AND, OR and NOT Gates (Inverter)
2. Function Design with XOR and XNOR
3. Half, Full and Ripple-Carry Adders
4. D Flip-Flop and Latch
5. JK Flip-Flop and Latch
6. Dynamic and Domino Logic for AND and OR Gates