https://github.com/sdasgup3/parallel-processor-design

Super scalar Processor design
https://github.com/sdasgup3/parallel-processor-design

assembler bison branch-prediction bypassing flex forwarding instruction-level-parallelism instruction-set instruction-set-architecture mnemonics opcode parallel-computing pipeline-cpu pipeline-processor processor processor-architecture processor-simulator superscalar verilog verilog-hdl

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Super scalar Processor design

• Host: GitHub
• URL: https://github.com/sdasgup3/parallel-processor-design
• Owner: sdasgup3
• Created: 2014-09-07T22:05:40.000Z (over 10 years ago)
• Default Branch: master
• Last Pushed: 2014-09-07T22:11:26.000Z (over 10 years ago)
• Last Synced: 2023-08-14T19:16:40.320Z (over 1 year ago)
• Topics: assembler, bison, branch-prediction, bypassing, flex, forwarding, instruction-level-parallelism, instruction-set, instruction-set-architecture, mnemonics, opcode, parallel-computing, pipeline-cpu, pipeline-processor, processor, processor-architecture, processor-simulator, superscalar, verilog, verilog-hdl
• Language: Verilog
• Homepage:
• Size: 137 KB
• Stars: 19
• Watchers: 2
• Forks: 3
• Open Issues: 0
• Metadata Files:
  • Readme: README.md

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README

        
Parallel-Processor-Design

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To design a customized processor (using parallel processing concepts) for the application of document retrieval system. We developed a superscalar processor (with  an issue rate of 2) using verilog hdl, and an assembler for that processor using flex and bison.