https://github.com/sehugg/fpga-examples
FPGA examples for 8bitworkshop.com
https://github.com/sehugg/fpga-examples
Last synced: 4 months ago
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FPGA examples for 8bitworkshop.com
- Host: GitHub
- URL: https://github.com/sehugg/fpga-examples
- Owner: sehugg
- License: cc0-1.0
- Created: 2018-10-14T15:08:01.000Z (over 7 years ago)
- Default Branch: master
- Last Pushed: 2019-05-23T21:34:07.000Z (about 7 years ago)
- Last Synced: 2025-01-15T14:15:25.699Z (over 1 year ago)
- Language: Verilog
- Size: 29.3 KB
- Stars: 29
- Watchers: 5
- Forks: 9
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
- awesome-8bitgamedev - fpga-examples - These are some of the Verilog examples from the book "Designing Video Game Hardware in Verilog" ported to CRT monitor timing and tested against the IceStorm tools. (Hardware / FPGA/HDL)
README
# fpga-examples
These are some of the Verilog examples from the book
["Designing Video Game Hardware in Verilog"](https://www.amazon.com/gp/product/1728619440/ref=as_li_tl?ie=UTF8&camp=1789&creative=9325&creativeASIN=1728619440&linkCode=as2&tag=pzp-20&linkId=c149f6365c0a676065eb6d7c5f8dd6ae)
ported to CRT monitor timing and tested against the [IceStorm](http://www.clifford.at/icestorm/) tools.
## Installation
On Ubuntu:
sudo apt-get install yosys arachne-pnr
git clone https://github.com/sehugg/fpga-examples
cd fpga-examples/ice40
To syntheisize and upload to the FPGA:
make starfield.bin
iceprog starfield.bin
To connect the FPGA to a composite output, you might need to make a 2-bit DAC out of resistors, [like this one](https://web.archive.org/web/20181001053135/http://www.rickard.gunee.com/projects/video/pic/howto.php).
## License
All files in this repo are licensed under [CC0](https://creativecommons.org/publicdomain/zero/1.0/) (public domain)