https://github.com/semify-eda/fstdumper

Verilog VPI module to dump FST (Fast Signal Trace) databases
https://github.com/semify-eda/fstdumper

simulator systemverilog verilog vpi waveform

Last synced: 5 months ago
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Verilog VPI module to dump FST (Fast Signal Trace) databases

• Host: GitHub
• URL: https://github.com/semify-eda/fstdumper
• Owner: semify-eda
• License: gpl-3.0
• Created: 2021-08-11T13:48:17.000Z (over 3 years ago)
• Default Branch: main
• Last Pushed: 2023-09-19T08:51:26.000Z (over 1 year ago)
• Last Synced: 2024-08-03T01:24:43.722Z (9 months ago)
• Topics: simulator, systemverilog, verilog, vpi, waveform
• Language: C
• Homepage:
• Size: 313 KB
• Stars: 14
• Watchers: 2
• Forks: 2
• Open Issues: 4
• Metadata Files:
  • Readme: README.md
  • License: LICENSE

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