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https://github.com/sinakarvandi/fpga
Random FPGA Projects
https://github.com/sinakarvandi/fpga
chisel3 fpga verilog vhdl vitis vivado zynq
Last synced: 3 days ago
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Random FPGA Projects
- Host: GitHub
- URL: https://github.com/sinakarvandi/fpga
- Owner: SinaKarvandi
- License: mit
- Created: 2020-04-11T13:20:39.000Z (almost 5 years ago)
- Default Branch: master
- Last Pushed: 2023-04-24T05:54:44.000Z (over 1 year ago)
- Last Synced: 2024-11-17T07:29:32.404Z (2 months ago)
- Topics: chisel3, fpga, verilog, vhdl, vitis, vivado, zynq
- Language: VHDL
- Homepage:
- Size: 7.54 MB
- Stars: 2
- Watchers: 3
- Forks: 1
- Open Issues: 0
-
Metadata Files:
- Readme: README.md
- License: LICENSE
Awesome Lists containing this project
README
# FPGA Projects
This repo contains a collection of my fun FPGA projects. All of them are based on Xilinx FPGAs, Spartan6 (ISE Design Suite), and Zynq (ZedBoard, Pynq z1 - Vivado and Vitis IDE).
## Zynq
The following projects are in this directory `VGA Interface`, `VGA Snake Game`, `Block Ram Reset`, `Chisel Tests`, `Zedboard OLED Interface`, SPI Controller`.
### VGA Interface
Here's the pictures of VGA interface, written in VHDL.VGA Interface 1 | VGA Interface 2
:-------------------------:|:-------------------------:
![](https://raw.githubusercontent.com/SinaKarvandi/FPGA/master/img/VGA-interface1.jpg) | ![](https://raw.githubusercontent.com/SinaKarvandi/FPGA/master/img/VGA-interface2.jpg)### VGA Snake Game
Here's the pictures of SNAKE game, written in VHDL.
1 | 2 | 3 | 4
:-------------------------:|:-------------------------:|:-------------------------:|:-------------------------:
![](https://raw.githubusercontent.com/SinaKarvandi/FPGA/master/img/Snake1.jpg) | ![](https://raw.githubusercontent.com/SinaKarvandi/FPGA/master/img/Snake2.jpg) | ![](https://raw.githubusercontent.com/SinaKarvandi/FPGA/master/img/Snake3.jpg) | ![](https://raw.githubusercontent.com/SinaKarvandi/FPGA/master/img/Snake4.jpg)## Spartan6
The following projects are in this directory `ClkDivider`, `Debouncer`, `PWM`, `PatternRecognitionBitStream`, `PriorityEncoder`, `TriStateBuffer`.
## License
All of these projects are licensed under MIT LICENSE.