https://github.com/udxs/hdl-vlsi-exprs

A collection of select Verilog/Innovus (GDS2-only) experiments
https://github.com/udxs/hdl-vlsi-exprs

Last synced: about 1 month ago
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A collection of select Verilog/Innovus (GDS2-only) experiments

• Host: GitHub
• URL: https://github.com/udxs/hdl-vlsi-exprs
• Owner: UDXS
• Created: 2021-10-21T04:26:24.000Z (about 3 years ago)
• Default Branch: master
• Last Pushed: 2022-08-31T11:55:37.000Z (over 2 years ago)
• Last Synced: 2023-03-06T09:33:09.312Z (almost 2 years ago)
• Language: SystemVerilog
• Size: 527 KB
• Stars: 1
• Watchers: 1
• Forks: 0
• Open Issues: 0

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