https://github.com/ultraembedded/core_soc

Basic Peripheral SoC (SPI, GPIO, Timer, UART)
https://github.com/ultraembedded/core_soc

fpga gpio spi timer uart verilog

Last synced: about 2 months ago
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Basic Peripheral SoC (SPI, GPIO, Timer, UART)

• Host: GitHub
• URL: https://github.com/ultraembedded/core_soc
• Owner: ultraembedded
• License: gpl-2.0
• Created: 2019-08-10T18:13:04.000Z (over 5 years ago)
• Default Branch: master
• Last Pushed: 2020-05-08T10:59:25.000Z (over 4 years ago)
• Last Synced: 2024-05-02T06:17:38.788Z (8 months ago)
• Topics: fpga, gpio, spi, timer, uart, verilog
• Language: Verilog
• Size: 63.5 KB
• Stars: 53
• Watchers: 6
• Forks: 9
• Open Issues: 1

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