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https://github.com/ultraembedded/core_spiflash
SPI-Flash XIP Interface (Verilog)
https://github.com/ultraembedded/core_spiflash
axi4 fpga spi spi-flash verilog xip
Last synced: 10 days ago
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SPI-Flash XIP Interface (Verilog)
- Host: GitHub
- URL: https://github.com/ultraembedded/core_spiflash
- Owner: ultraembedded
- License: lgpl-2.1
- Created: 2019-04-23T10:56:06.000Z (over 5 years ago)
- Default Branch: master
- Last Pushed: 2021-10-24T11:46:20.000Z (about 3 years ago)
- Last Synced: 2024-11-12T22:16:50.423Z (2 months ago)
- Topics: axi4, fpga, spi, spi-flash, verilog, xip
- Language: Verilog
- Size: 23.4 KB
- Stars: 35
- Watchers: 5
- Forks: 12
- Open Issues: 0