https://github.com/ultraembedded/core_usb_fs_phy

USB Full Speed PHY
https://github.com/ultraembedded/core_usb_fs_phy

fpga usb verilog

Last synced: 25 days ago
JSON representation

USB Full Speed PHY

• Host: GitHub
• URL: https://github.com/ultraembedded/core_usb_fs_phy
• Owner: ultraembedded
• License: lgpl-2.1
• Created: 2019-07-20T17:17:31.000Z (over 5 years ago)
• Default Branch: master
• Last Pushed: 2020-05-03T19:47:47.000Z (almost 5 years ago)
• Last Synced: 2024-11-12T22:16:50.288Z (3 months ago)
• Topics: fpga, usb, verilog
• Language: Verilog
• Size: 17.6 KB
• Stars: 39
• Watchers: 4
• Forks: 6
• Open Issues: 1

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